There is not a fundamental limit like an old ISA board where DMA can be only to an address < 16M, so set the MAX_DMA_ADDRESS accordingly. Signed-off-by: Tomaso Paoletti <tpaoletti@xxxxxxxxxxxxxxxxxx> Signed-off-by: Paul Gortmaker <Paul.Gortmaker@xxxxxxxxxxxxx> Signed-off-by: David Daney <ddaney@xxxxxxxxxxxxxxxxxx> --- arch/mips/include/asm/dma.h | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/arch/mips/include/asm/dma.h b/arch/mips/include/asm/dma.h index 1353c81..1706089 100644 --- a/arch/mips/include/asm/dma.h +++ b/arch/mips/include/asm/dma.h @@ -87,6 +87,13 @@ #if defined(CONFIG_SGI_IP22) || defined(CONFIG_SGI_IP28) /* don't care; ISA bus master won't work, ISA slave DMA supports 32bit addr */ #define MAX_DMA_ADDRESS PAGE_OFFSET +#elif defined(CONFIG_CPU_CAVIUM_OCTEON) +/* Octeon can support DMA to any memory installed */ +#ifdef CONFIG_64BIT +#define MAX_DMA_ADDRESS (PAGE_OFFSET + (1ull<<32)) +#else +#define MAX_DMA_ADDRESS (PAGE_OFFSET + (1ul<<30)) +#endif #else #define MAX_DMA_ADDRESS (PAGE_OFFSET + 0x01000000) #endif -- 1.5.6.5
