On Wed, Aug 06, 2008 at 10:49:01AM +0900, Yoichi Yuasa wrote:
> In VR4100 series User's Manual, it's being written
> "IE bit of the Status register in the CP0 is also set to 1".
>
> Do you have any problem on your board?
Hello Yoichi,
Just now I got my hands on the manual, I can see that the standby
instruction sets IE bit to 1 but only on Vr4131 and Vr4181A cores, all
others (such as my Vr4121) need to have interrupts enabled before going
into standby.
The patch will make it work on all Vr4100 derivates, or we could also
add code to build the function depending on CPU type. What do you think?
Ricardo
