include/asm-mips/txx9/txx927.h is no longer used.
Signed-off-by: Atsushi Nemoto <anemo@xxxxxxxxxxxxx>
---
This patch can be applied on top of my txx9 patch series and mips-kgdb patches.
include/asm-mips/txx9/tx3927.h | 2 -
include/asm-mips/txx9/txx927.h | 121 ----------------------------------------
2 files changed, 0 insertions(+), 123 deletions(-)
delete mode 100644 include/asm-mips/txx9/txx927.h
diff --git a/include/asm-mips/txx9/tx3927.h b/include/asm-mips/txx9/tx3927.h
index 14e0636..587deb9 100644
--- a/include/asm-mips/txx9/tx3927.h
+++ b/include/asm-mips/txx9/tx3927.h
@@ -8,8 +8,6 @@
#ifndef __ASM_TXX9_TX3927_H
#define __ASM_TXX9_TX3927_H
-#include <asm/txx9/txx927.h>
-
#define TX3927_REG_BASE 0xfffe0000UL
#define TX3927_REG_SIZE 0x00010000
#define TX3927_SDRAMC_REG (TX3927_REG_BASE + 0x8000)
diff --git a/include/asm-mips/txx9/txx927.h b/include/asm-mips/txx9/txx927.h
deleted file mode 100644
index 97dd7ad..0000000
--- a/include/asm-mips/txx9/txx927.h
+++ /dev/null
@@ -1,121 +0,0 @@
-/*
- * Common definitions for TX3927/TX4927
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000 Toshiba Corporation
- */
-#ifndef __ASM_TXX9_TXX927_H
-#define __ASM_TXX9_TXX927_H
-
-struct txx927_sio_reg {
- volatile unsigned long lcr;
- volatile unsigned long dicr;
- volatile unsigned long disr;
- volatile unsigned long cisr;
- volatile unsigned long fcr;
- volatile unsigned long flcr;
- volatile unsigned long bgr;
- volatile unsigned long tfifo;
- volatile unsigned long rfifo;
-};
-
-/*
- * SIO
- */
-/* SILCR : Line Control */
-#define TXx927_SILCR_SCS_MASK 0x00000060
-#define TXx927_SILCR_SCS_IMCLK 0x00000000
-#define TXx927_SILCR_SCS_IMCLK_BG 0x00000020
-#define TXx927_SILCR_SCS_SCLK 0x00000040
-#define TXx927_SILCR_SCS_SCLK_BG 0x00000060
-#define TXx927_SILCR_UEPS 0x00000010
-#define TXx927_SILCR_UPEN 0x00000008
-#define TXx927_SILCR_USBL_MASK 0x00000004
-#define TXx927_SILCR_USBL_1BIT 0x00000004
-#define TXx927_SILCR_USBL_2BIT 0x00000000
-#define TXx927_SILCR_UMODE_MASK 0x00000003
-#define TXx927_SILCR_UMODE_8BIT 0x00000000
-#define TXx927_SILCR_UMODE_7BIT 0x00000001
-
-/* SIDICR : DMA/Int. Control */
-#define TXx927_SIDICR_TDE 0x00008000
-#define TXx927_SIDICR_RDE 0x00004000
-#define TXx927_SIDICR_TIE 0x00002000
-#define TXx927_SIDICR_RIE 0x00001000
-#define TXx927_SIDICR_SPIE 0x00000800
-#define TXx927_SIDICR_CTSAC 0x00000600
-#define TXx927_SIDICR_STIE_MASK 0x0000003f
-#define TXx927_SIDICR_STIE_OERS 0x00000020
-#define TXx927_SIDICR_STIE_CTSS 0x00000010
-#define TXx927_SIDICR_STIE_RBRKD 0x00000008
-#define TXx927_SIDICR_STIE_TRDY 0x00000004
-#define TXx927_SIDICR_STIE_TXALS 0x00000002
-#define TXx927_SIDICR_STIE_UBRKD 0x00000001
-
-/* SIDISR : DMA/Int. Status */
-#define TXx927_SIDISR_UBRK 0x00008000
-#define TXx927_SIDISR_UVALID 0x00004000
-#define TXx927_SIDISR_UFER 0x00002000
-#define TXx927_SIDISR_UPER 0x00001000
-#define TXx927_SIDISR_UOER 0x00000800
-#define TXx927_SIDISR_ERI 0x00000400
-#define TXx927_SIDISR_TOUT 0x00000200
-#define TXx927_SIDISR_TDIS 0x00000100
-#define TXx927_SIDISR_RDIS 0x00000080
-#define TXx927_SIDISR_STIS 0x00000040
-#define TXx927_SIDISR_RFDN_MASK 0x0000001f
-
-/* SICISR : Change Int. Status */
-#define TXx927_SICISR_OERS 0x00000020
-#define TXx927_SICISR_CTSS 0x00000010
-#define TXx927_SICISR_RBRKD 0x00000008
-#define TXx927_SICISR_TRDY 0x00000004
-#define TXx927_SICISR_TXALS 0x00000002
-#define TXx927_SICISR_UBRKD 0x00000001
-
-/* SIFCR : FIFO Control */
-#define TXx927_SIFCR_SWRST 0x00008000
-#define TXx927_SIFCR_RDIL_MASK 0x00000180
-#define TXx927_SIFCR_RDIL_1 0x00000000
-#define TXx927_SIFCR_RDIL_4 0x00000080
-#define TXx927_SIFCR_RDIL_8 0x00000100
-#define TXx927_SIFCR_RDIL_12 0x00000180
-#define TXx927_SIFCR_RDIL_MAX 0x00000180
-#define TXx927_SIFCR_TDIL_MASK 0x00000018
-#define TXx927_SIFCR_TDIL_MASK 0x00000018
-#define TXx927_SIFCR_TDIL_1 0x00000000
-#define TXx927_SIFCR_TDIL_4 0x00000001
-#define TXx927_SIFCR_TDIL_8 0x00000010
-#define TXx927_SIFCR_TDIL_MAX 0x00000010
-#define TXx927_SIFCR_TFRST 0x00000004
-#define TXx927_SIFCR_RFRST 0x00000002
-#define TXx927_SIFCR_FRSTE 0x00000001
-#define TXx927_SIO_TX_FIFO 8
-#define TXx927_SIO_RX_FIFO 16
-
-/* SIFLCR : Flow Control */
-#define TXx927_SIFLCR_RCS 0x00001000
-#define TXx927_SIFLCR_TES 0x00000800
-#define TXx927_SIFLCR_RTSSC 0x00000200
-#define TXx927_SIFLCR_RSDE 0x00000100
-#define TXx927_SIFLCR_TSDE 0x00000080
-#define TXx927_SIFLCR_RTSTL_MASK 0x0000001e
-#define TXx927_SIFLCR_RTSTL_MAX 0x0000001e
-#define TXx927_SIFLCR_TBRK 0x00000001
-
-/* SIBGR : Baudrate Control */
-#define TXx927_SIBGR_BCLK_MASK 0x00000300
-#define TXx927_SIBGR_BCLK_T0 0x00000000
-#define TXx927_SIBGR_BCLK_T2 0x00000100
-#define TXx927_SIBGR_BCLK_T4 0x00000200
-#define TXx927_SIBGR_BCLK_T6 0x00000300
-#define TXx927_SIBGR_BRD_MASK 0x000000ff
-
-/*
- * PIO
- */
-
-#endif /* __ASM_TXX9_TXX927_H */
--
1.5.5.5
