RE: [SPAM] RE: Bug in atomic_sub_if_positive

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Thanks for the reply. My main point is that if the sc instruction fails (returns zero) then we need to start over (with another ll instruction.) It appears that the current code does not do this correctly. If you have a better suggestion for a patch, that's fine with me. Below is the code from the 2.6.20.21 kernel, which is (also) working for me.

=:-) Morten


                 __asm__ __volatile__(
                 "       .set    mips3                                   \n"
                 "1:     ll      %1, %2          # atomic_sub_if_positive\n"
                 "       subu    %0, %1, %3                              \n"
                 "       bltz    %0, 1f                                  \n"
                 "       sc      %0, %2                                  \n"
                 "       .set    noreorder                               \n"
                 "       beqz    %0, 1b                                  \n"
                 "        subu   %0, %1, %3                              \n"
                 "       .set    reorder                                 \n"
                 "1:                                                     \n"
                 "       .set    mips0                                   \n"
                 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
                 : "Ir" (i), "m" (v->counter)
                 : "memory");



________________________________

	From: Markus Gothe [mailto:markus.gothe@xxxxxx] 
	Sent: Tuesday, July 01, 2008 5:29 PM
	To: Morten Larsen
	Cc: linux-mips@xxxxxxxxxxxxxx
	Subject: Re: [SPAM] RE: Bug in atomic_sub_if_positive
	
	
	NACK. 

	You must realize that 1b stands for 'label 1, backwards', so correctly it would be '2: b 1f'... Which is a kind off inconsequent numbering in this case.

	//Markus

	On 2 Jul 2008, at 02:12, Morten Larsen wrote:



			As far as I can tell the branch optimization fixes in 2.6.21 introduced
			

			a bug in atomic_sub_if_positive that causes it to return even when the
			

			sc instruction fails. The result is that e.g. down_trylock becomes
			

			unreliable as the semaphore counter is not always decremented.
			


		Previous patch was garbled by Outlook - this one should be clean:
		
		--- a/include/asm-mips/atomic.h 2008-06-25 22:38:43.159739000 -0700
		+++ b/include/asm-mips/atomic.h 2008-06-25 22:39:07.552065000 -0700
		@@ -292,10 +292,10 @@ static __inline__ int atomic_sub_if_posi
		" beqz %0, 2f \n"
		" subu %0, %1, %3 \n"
		" .set reorder \n"
		- "1: \n"
		" .subsection 2 \n"
		"2: b 1b \n"
		" .previous \n"
		+ "1: \n"
		" .set mips0 \n"
		: "=&r" (result), "=&r" (temp), "=m" (v->counter)
		: "Ir" (i), "m" (v->counter)
		@@ -682,10 +682,10 @@ static __inline__ long atomic64_sub_if_p
		" beqz %0, 2f \n"
		" dsubu %0, %1, %3 \n"
		" .set reorder \n"
		- "1: \n"
		" .subsection 2 \n"
		"2: b 1b \n"
		" .previous \n"
		+ "1: \n"
		" .set mips0 \n"
		: "=&r" (result), "=&r" (temp), "=m" (v->counter)
		: "Ir" (i), "m" (v->counter)
		


			_______________________________________

	Mr Markus Gothe
	Software Engineer

	Phone: +46 (0)13 21 81 20 (ext. 1046)
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