Hello.
> Manuel Lauss wrote:
>
>>>> diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
>>>> index 2709675..bb22649 100644
>>>> --- a/arch/mips/mm/c-r4k.c
>>>> +++ b/arch/mips/mm/c-r4k.c
>>>>
>>> [...]
>>>
>>>
>>>> @@ -1287,20 +1262,18 @@ static void __cpuinit coherency_setup(void)
>>>> case CPU_R4400MC:
>>>> clear_c0_config(CONF_CU);
>>>> break;
>>>> - /*
>>>> - * We need to catch the early Alchemy SOCs with
>>>> - * the write-only co_config.od bit and set it back to one...
>>>> - */
>>>> - case CPU_AU1000: /* rev. DA, HA, HB */
>>>> - case CPU_AU1100: /* rev. AB, BA, BC ?? */
>>>> - case CPU_AU1500: /* rev. AB */
>>>> - au1x00_fixup_config_od();
>>>> - break;
>>>> case PRID_IMP_PR4450:
>>>> nxp_pr4450_fixup_config();
>>>> break;
>>>> }
>>>> +
>>>> +#ifdef CONFIG_MACH_ALCHEMY
>>>> + {
>>>> + extern void au1x00_fixup_config_od(void);
>>>> + au1x00_fixup_config_od();
>>>> + }
>>>> +#endif
>>>> }
>>>>
>>> I've been thru this before. Ralf will hardly accept #ifdef'ery and
>>> extern in this file. That's why we have what we have now. :-)
>>>
>>
>> I believe it can be removed entirely from c-r4k.c, the Alchemy
>> plat_mem_setup and resume code run it too (and earlier).
>>
>
> You cleraly didn't get it. ;-)
> It's here because what is written earlier was *discarded* while doing the
> coherency setup (remember, the OD bit is write only, so you can't just RMW
> the Config reg).
> That lead to some crap with USB on Au1500 in particular, IIRC.
Ah ok. I'll leave c-r4k untouched then. Thanks.
Manuel Lauss
