On Tue, Jan 22, 2008 at 12:55:45PM -0600, Chris Friesen wrote:
>>> gethrtime(void)
>>> {
>>> unsigned long long result;
>>>
>>> asm volatile ("rdhwr %0,$31" : "=r" (result));
>
>> Ah, Cavium.
>
> Yes indeed. Any peculiarities that we should be watching out for? Previous
> mailing list threads would be great.
Cavium so far received little coverage on this list - but seems you're
about to start this. The reason why I was able to identify Cavium is that
afaics only Cavium is the only 64-bit CPU to implement a 64-bit timer in
hardware register $31.
The definition of rdhwr is generic and I think if anybody has considered
this specific interaction of ABI and processor architecture then it was
probably found not to implement such a special read because it is messy
in more than one way.
Ralf
