On Tue, Jan 22, 2008 at 10:20:06AM -0500, Kumba wrote: > No effect on Octane R14000A, as far as lockups. Spikes the CPU usage in 'ps > aux', but that's about it. So far it seems R12000 and R14000 are unaffected. > If I can get my plucky IP32 R10K to boot again soon, I may try it there for > kicks and giggles. Maybe we're also seeing a side effect of the R10K's spec > exec knocking the non-cache-coherent machines out? > > Also, tried building the code with the R10K cache barrier on to see if anything > else changes? Generally reserved for kernel stuff, but Peter once speculated > userland might have a use for it. It's a cache instruction so priviledged which means userspace can't execute it. It's also entirely unclear if a cache barrier instruction would make a difference at all. Ralf