On Thu, 25 Oct 2007, Ralf Baechle wrote: > That said, irq 0 is imho totally valid (take the good old PIT timer > interrupt of the PC as the classic example) and treating it as an invalid > interrupt number is broken. I would rather -1 stood for the invalid IRQ number -- unlike with 0 chances are nobody will need 4G of interrupt lines or vectors (as applicable) in a single system. We sort of escape the problem with the MIPS processors because the IP0 bit of the Cause register is a software interrupt that is not used by devices, but still some platforms bypass the built-in interrupt "controller" as only a single source is used in the Cause register and want to start the numbering of lines in the external controller from 0. Maciej
