Maciej W. Rozycki wrote: > On Mon, 27 Aug 2007, bo y wrote: > > > Should the following instruction field masks to be 0x3f ? > > > > #define OP_MASK 0x2f > > #define FUNC_MASK 0x2f > > > > I do not see OP_MASK is used but FUNC_MASK is used in the same file. > > Yes. Send a patch. Appended, please apply. Thiemo Signed-Off-By: Thiemo Seufer <ths@xxxxxxxxxxxx> diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 4ec0964..9cb3964 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -78,7 +78,7 @@ enum fields SET = 0x200 }; -#define OP_MASK 0x2f +#define OP_MASK 0x3f #define OP_SH 26 #define RS_MASK 0x1f #define RS_SH 21 @@ -92,7 +92,7 @@ enum fields #define IMM_SH 0 #define JIMM_MASK 0x3ffffff #define JIMM_SH 0 -#define FUNC_MASK 0x2f +#define FUNC_MASK 0x3f #define FUNC_SH 0 #define SET_MASK 0x7 #define SET_SH 0
