On Mon, Aug 06, 2007 at 08:05:29PM +0200, Michael Buesch wrote:
> On Monday 06 August 2007, Aurelien Jarno wrote:
> > The patch below against 2.6.23-rc1-mm2 adds support for BCM947xx CPUs.
> > It originally comes from the OpenWrt patches.
> >
> > Cc: Michael Buesch <mb@xxxxxxxxx>
> > Cc: Waldemar Brodkorb <wbx@xxxxxxxxxxx>
> > Cc: Felix Fietkau <nbd@xxxxxxxxxxx>
> > Cc: Florian Schirmer <jolt@xxxxxxxxxx>
> > Signed-off-by: Aurelien Jarno <aurelien@xxxxxxxxxxx>
[snip]
> > --- a/arch/mips/bcm947xx/setup.c
> > +++ b/arch/mips/bcm947xx/setup.c
> > @@ -0,0 +1,106 @@
[snip]
> > +static void bcm947xx_machine_halt(void)
> > +{
> > + /* Disable interrupts and watchdog and spin forever */
> > + local_irq_disable();
> > + ssb_chipco_watchdog_timer_set(&ssb.chipco, 0);
> > + while (1)
> > + cpu_relax();
> > +}
> > +
> > +static int bcm947xx_get_invariants(struct ssb_bus *bus, struct ssb_init_invariants *iv)
> > +{
>
> No reading of NVRAM, yet?
This requires CFE support, and this part is still a bit problematic now.
There are already CFE files for SiByte support, and I think it's not a
good idea to have too different implementations.
I will add a comment here;
> > + return 0;
> > +}
> > +
> > +void __init plat_mem_setup(void)
> > +{
> > + int i, err;
> > + struct ssb_mipscore *mcore;
> > +
> > + err = ssb_bus_ssbbus_register(&ssb, SSB_ENUM_BASE, bcm947xx_get_invariants);
> > + if (err) {
> > + const char *msg = "Failed to initialize SSB bus (err %d)\n";
> > + panic(msg, err);
>
> We don't need the msg variable anymore.
I will fix that.
--
.''`. Aurelien Jarno | GPG: 1024D/F1BCDB73
: :' : Debian developer | Electrical Engineer
`. `' aurel32@xxxxxxxxxx | aurelien@xxxxxxxxxxx
`- people.debian.org/~aurel32 | www.aurel32.net
