On Mon, 18 Jun 2007 12:32:37 -0400 (EDT), sknauert@xxxxxxxxxxxx wrote:
> Justing bumping this topic, I'm really stuck and could use some (any) help
> here. I understand that people are busy and most effort is focused on
> 2.6.23, but I haven't received any response regarding my prelimenary patch
> and its been over a week.
I suppose HAVE_PCI_LEGACY provides us a standard way to access 8/16/32
bit registers in PCI I/O space, right?
If so, it would be great; When I tried to read a 16-bit register in
PCI I/O space from userland, I had to find a physical address of the
PCI I/O region and mmap it via /dev/mem, since /dev/port only supports
8bit access.
Also I'd suggest to support multiple PCI busses (please refer iomap-pci.c):
Something like this:
int pci_legacy_read(struct pci_bus *bus, u16 port, u32 *val, u8 size)
{
struct pci_controller *ctrl = bus->sysdata;
unsigned long base = ctrl->io_map_base;
void __iomem *addr = (void __iomem *)(ctrl->io_map_base + port);
int ret = size;
switch (size) {
case 1:
*val = ioread8(addr);
break;
case 2:
*val = ioread16(addr);
break;
case 4:
*val = ioread32(addr);
break;
default:
ret = -EINVAL;
break;
}
return ret;
}
Also I think no need to add "mips_" prefix and make aliases. (unless
we really need to override them for each platform)
> +#define pci_get_legacy_mem mips_pci_get_legacy_mem
> +#define pci_legacy_read mips_pci_legacy_read
> +#define pci_legacy_write mips_pci_legacy_write
---
Atsushi Nemoto
