[ $SUBJECT is getting less accurate... ] There are already big-endian support patches for EHCI in the USB queue. I strongly suspect this patch will clash with those. For example, they obviously don't cope with mixed configuration systems, where an SOC includes big-endian EHCI registers but there's also PCI which is "normal"-endian. The register accessors all accept a handle to the host controller, so they can figure out which byte sex to use on an access-by-access basis if the system needs that... Another split you need to do: the usb/core/hub.c stuff should be a patch in its own right. But hmm, wait ... that looks like it mirrors something done in another EHCI patch that's already in the USB queue. There's some other EHCI silicon that chose the "software (vs hardware) powers ports off" implementation option. So you should grab those patches from Greg's queue and redo yours to match. Looks like a bunch of the host side work you did has already been done... - Dave
