On Sun, Apr 08, 2007 at 04:20:00PM +0400, Sergei Shtylyov wrote: > Thomas Bogendoerfer wrote: > > >PCI based SNI RM machines have their EISA bus behind an Intel PCI/EISA > >bridge. So the PCI IO range must start at 0x0000. Changing that will > >break the PCI bus, because i8259.c already has registered it's IO > >addresses before the PCI bus gets initialized. Below is a patch, > >which will register the PCI host bridge resources inside > >register_pci_controller(). It also changes i8259.c to use insert_region(), > >because request_resource() will fail, if the IO space of the PIT hanging > >of the PCI host bridge (maybe passing the resource parent to > >init_i8259_irqs() is a cleaner fix for that). > > First, I don't understand how PIT and PIC resources may intersect. Then, oops, I meant PIC resources. > IIUC, using inert_resource() will cause PIT resource be the child of the > PIC resource which doesn't make sense either. the insert_resource will make it child of the PCI resource, which makes perfect sense, because the ISA bus is behind the PCI host bridge. Thomas. -- Crap can work. Given enough thrust pigs will fly, but it's not necessary a good idea. [ RFC1925, 2.3 ]
