This patch updates sb1250-swarm-defconfig file to default to Sibyte Bn silicon as the PASS_1 processors are very old. Signed-off-by: Manoj Ekbote <manoje@xxxxxxxxxxxx> ---- diff --git a/arch/mips/configs/sb1250-swarm_defconfig b/arch/mips/configs/sb1250-swarm_defconfig index 533df6f..45b68de 100644 --- a/arch/mips/configs/sb1250-swarm_defconfig +++ b/arch/mips/configs/sb1250-swarm_defconfig @@ -65,9 +65,9 @@ CONFIG_SIBYTE_SWARM=y # CONFIG_TOSHIBA_RBTX4938 is not set CONFIG_SIBYTE_SB1250=y CONFIG_SIBYTE_SB1xxx_SOC=y -CONFIG_CPU_SB1_PASS_1=y +# CONFIG_CPU_SB1_PASS_1 is not set # CONFIG_CPU_SB1_PASS_2_1250 is not set -# CONFIG_CPU_SB1_PASS_2_2 is not set +CONFIG_CPU_SB1_PASS_2_2=y # CONFIG_CPU_SB1_PASS_4 is not set # CONFIG_CPU_SB1_PASS_2_112x is not set # CONFIG_CPU_SB1_PASS_3 is not set @@ -142,7 +142,7 @@ CONFIG_MIPS_MT_DISABLED=y # CONFIG_MIPS_MT_SMP is not set # CONFIG_MIPS_MT_SMTC is not set # CONFIG_MIPS_VPE_LOADER is not set -CONFIG_SB1_PASS_1_WORKAROUNDS=y +CONFIG_SB1_PASS_2_WORKAROUNDS=y CONFIG_CPU_HAS_LLSC=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y
