This patch has fixed UART I/O type.
The cobalt UART device is actually connected to memory resource area.
Yoichi
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@xxxxxxxxxxxxxx>
diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/cobalt/setup.c mips/arch/mips/cobalt/setup.c
--- mips-orig/arch/mips/cobalt/setup.c 2007-02-07 18:24:06.652083250 +0900
+++ mips/arch/mips/cobalt/setup.c 2007-02-08 15:39:32.309132500 +0900
@@ -130,7 +130,7 @@ void __init plat_mem_setup(void)
set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE));
- /* I/O port resource must include UART and LCD/buttons */
+ /* I/O port resource must include LCD/buttons */
ioport_resource.end = 0x0fffffff;
/* request I/O space for devices used on all i[345]86 PCs */
@@ -149,24 +149,24 @@ void __init plat_mem_setup(void)
register_pci_controller(&cobalt_pci_controller);
#endif
-#ifdef CONFIG_SERIAL_8250
if (cobalt_board_id > COBALT_BRD_ID_RAQ1) {
-
#ifdef CONFIG_EARLY_PRINTK
cobalt_early_console();
#endif
+#ifdef CONFIG_SERIAL_8250
uart.line = 0;
uart.type = PORT_UNKNOWN;
uart.uartclk = 18432000;
uart.irq = COBALT_SERIAL_IRQ;
- uart.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
- uart.iobase = 0xc800000;
- uart.iotype = UPIO_PORT;
+ uart.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF |
+ UPF_SKIP_TEST;
+ uart.iotype = UPIO_MEM;
+ uart.mapbase = 0x1c800000;
early_serial_setup(&uart);
- }
#endif
+ }
}
/*
