Hello.
Ashlesha Shintre wrote:
Ah, I forgot to mention that if your UART is a part of the south bridge,
its IRQ number is _4_ on the integrated 8259 interrupt controller. I'm sure
that AU1000_GPIO_0 is the cascaded interrupt request from 8259, not the UART's
own IRQ...
static struct plat_serial8250_port encm3_via_uart_data[] = {
{
.mapbase = 0x3f8,
.irq = AU1000_GPIO_0,
So, this is wrong. You need to specify to what platform IRQ 8259's IRQ4
gets routed here.
I m not sure what you mean here -- the AU1000_GPIO_0 is the cascaded
interrupt request from the 8259 on the VIA Southbridge --
I meant that the UART interrupts from the south bridge *cannot* be
delivered *directly* to the Alchemy's embedded interrupt controller), so
AU1000_GPIO_0 must be used to deliver all the interrupts from 8259 (the
interrupt controller integrated into the south bridge) to the embedded
interrupt controller. So, you need to setup some kind of the cascading
interrupt handler for AU1000_GPIO_0 to read the vector from 8259 I think...
Best Regards,
Ashlesha.
WBR, Sergei
