Hello.
Ralf Baechle wrote:
@@ -104,6 +105,7 @@ static struct irq_chip mips_mt_cpu_irq_c
.mask = mask_mips_mt_irq,
.mask_ack = mips_mt_cpu_irq_ack,
.unmask = unmask_mips_mt_irq,
+ .eoi = unmask_mips_mt_irq,
.end = mips_mt_cpu_irq_end,
};
@@ -124,7 +126,8 @@ void __init mips_cpu_irq_init(int irq_ba
set_irq_chip(i, &mips_mt_cpu_irq_controller);
for (i = irq_base + 2; i < irq_base + 8; i++)
- set_irq_chip(i, &mips_cpu_irq_controller);
+ set_irq_chip_and_handler(i, &mips_cpu_irq_controller,
+ handle_level_irq);
BTW, isn't IRQ7 per-CPU?
Yes and no. On many CPUs IRQ 7 can be configured at reset time as either
the count / compare interrupt or a CPU interrupt just like the others.
It always used to be a normal CPU interrupt for R2000 class CPUs.
Nevertheless, IRQ7 having percpu flow when it's known to be from
count/compare would make the timer stuff faster, I assume...
Ralf
WBR, Sergei
