On Mon, Nov 06, 2006 at 03:42:32PM +0100, Gideon Stupp (gstupp) wrote: > I am trying to figure out why there is a sync operation in > linux/include/asm-mips/atomic.h:atomic_add_return(). > I believe it was added in the linux-2.4.19 patch, but can't trace the > reason. Can anyone help? MIPS is a weakly ordered architecture. In theory. So those syncs are required to ensure proper global ordering. In practice only the Sibyte SB1 and RM9000 CMPs are documented to be weakly ordered but I've never actually observed a single reordering related bug on any MIPS multiprocessor which may either mean no reordering happens in practice or I'm a genious managed to fix all reordering related bugs before they could strike. I tend to assume the latter ;-) On a uniprocessor these syncs are definately not needed and I have a patch to remove the sync for uniprocessor kernels and known to be strongly ordered SMPs waiting for 2.6.20. Ralf
