On Thu, Oct 26, 2006 at 01:05:52PM +0900, Atsushi Nemoto wrote:
> I think I found the problem at last.
I'm afraid there is more than one problem.
On the 34K core each VPE has its own c0_count and c0_compare registers.
However the reset values are undefined. Which means the time offset
calculated by
offset = (clocksource_read(clock) - clock->cycle_last) & clock->mask;
may differ wildly between processors resulting in a time jitter of upto
almost 215s between both VPEs. Unfortunately there is an unavoidable
race condition when attempting to synchronize the two counters. But
the 34K's nature shrinks the time window to somwhere in the single digit
range of cycles so on a hardcore that would be a handfull of nanoseconds.
Anything that is less than the shortest time for a process to migrate
from one processor (VPE in case of 34K) to another is good enough as it
will guarantee that time cannot jump backward - but the jitter may still
be a a slight problem for the most demanding programs.
Others like RM9000x2 may have similar issues if the counter registers
don't come out of reset synchronized; need to look into that.
Ralf
