Hi,
I am facing problem in case of branch delay instruction.
When single stepping is done on a copied page,for an uncondition jump
instruction to the given target address ( e.g j, jal ),
epc jumps to the target address with respect to current address,
And if I tried to put break point over there....it gives error as
"CPU 0 Unable to handle kernel paging request at virtual
address c005eeb8, epc == c005eeb8"
Can anybody knows...how to solve this problem..?
~Nida
On 9/7/06, Nida M <nidajm@xxxxxxxxx> wrote:
> Insert a breakpoint instruction after the instruction you want to single
> step. Anything that triggers an exception but typicall a "break 0" would
> be used for debuggers. Branches need special care. Either they need to
> be executed in software or breakpoints at both the branch-taken and the
> not-taken address need to be inserted.
Instead of break 0, can I use Trap Exception 'Tr' with the special
case for single step BRK_SSTEPBP (break 5)
E.g : teq rs,rt,code
which is nothing but :
bne rs,rt,1f
nop
break code
....... ???
> And with all those hints I leave the special case of instructions in
> branch delay slots to the you, I'm sure you'll find it trivial ;-)
Thanks,I think i will do that
~Nida
