On Mon, 21 Aug 2006, Thiemo Seufer wrote: > Ralf Baechle wrote: > > On Mon, Aug 21, 2006 at 04:16:21PM +0100, Maciej W. Rozycki wrote: > > > > > > Well, the QEMU cpu has 2-way 2kB dcache... does not have aliasing > > > > anyway. :-) > > > > > > I don't think emulating a bigger cache so that we can add aliases should > > > be *that* difficult. Adding aliases themselves might be a bit trickier, > > > but the gain would certainly justify the hassle, wouldn't it? > > > > The cache lookup for every access would have serious impact on performance. > > The question is, is it worth the price? Would such patches be acceptable > > by the upstream qemu maintainers? > > Likely not, given that performance is the prime criterion there. It depends. If you just want to run MIPS Linux, yes. If you want to debug the kernel on a MIPS core with cache aliasing[*], no. [*] Replace with whatever slow-to-emulate and hard-to-debug feature. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds