On Sat, 19 Aug 2006 03:00:23 +0400, Sergei Shtylyov <sshtylyov@xxxxxxxxxxxxx> wrote: > TX49 CPUs have a write buffer, so we need to select CPU_HAS_WB -- otherwise > all Toshiba RBTX49xx kernels fail to build. TX49 CPUs also have a SYNC instruction which flushes a write buffer. I think it is enough and wbflush() have been abused in arch/mips/tx4927/ and arch/mips/tx4938/ codes. There is old thread about this issue: http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=Pine.GSO.3.96.1030415161611.13254H-100000%40delta.ds2.pg.gda.pl --- Atsushi Nemoto
