If there's built-in FPU in a MIPS32 CPU the first time the process tries
to use it, the kernel should crash with "reserved instruction" -- CPU will try
to execute 'dmtc1' which is a MIPS64 only insn. _init_fpu() was apprently
blindly copied form arch/mips64/... :-)
Since this occured with GXemul recently resending this 1.5 year old patch.
Signed-off-by: Sergei Shtylyov <sshtylyov@xxxxxxxxxxxxx>
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index 1999483..30b67c8 100644
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -134,7 +134,6 @@ LEAF(_restore_fp)
#define FPU_DEFAULT 0x00000000
LEAF(_init_fpu)
- .set mips3
mfc0 t0, CP0_STATUS
li t1, ST0_CU1
or t0, t1
@@ -146,24 +145,40 @@ LEAF(_init_fpu)
li t0, -1
- dmtc1 t0, $f0
- dmtc1 t0, $f2
- dmtc1 t0, $f4
- dmtc1 t0, $f6
- dmtc1 t0, $f8
- dmtc1 t0, $f10
- dmtc1 t0, $f12
- dmtc1 t0, $f14
- dmtc1 t0, $f16
- dmtc1 t0, $f18
- dmtc1 t0, $f20
- dmtc1 t0, $f22
- dmtc1 t0, $f24
- dmtc1 t0, $f26
- dmtc1 t0, $f28
+ mtc1 t0, $f0
+ mtc1 t0, $f1
+ mtc1 t0, $f2
+ mtc1 t0, $f3
+ mtc1 t0, $f4
+ mtc1 t0, $f5
+ mtc1 t0, $f6
+ mtc1 t0, $f7
+ mtc1 t0, $f8
+ mtc1 t0, $f9
+ mtc1 t0, $f10
+ mtc1 t0, $f11
+ mtc1 t0, $f12
+ mtc1 t0, $f13
+ mtc1 t0, $f14
+ mtc1 t0, $f15
+ mtc1 t0, $f16
+ mtc1 t0, $f17
+ mtc1 t0, $f18
+ mtc1 t0, $f19
+ mtc1 t0, $f20
+ mtc1 t0, $f21
+ mtc1 t0, $f22
+ mtc1 t0, $f23
+ mtc1 t0, $f24
+ mtc1 t0, $f25
+ mtc1 t0, $f26
+ mtc1 t0, $f27
+ mtc1 t0, $f28
+ mtc1 t0, $f29
+ mtc1 t0, $f30
.set noreorder
jr ra
- dmtc1 t0, $f30
.set reorder
+ mtc1 t0, $f31
END(_init_fpu)
