Hello, attached patch adds support for power management for the secondary general purpose I/O. Ciao, Rodolfo -- GNU/Linux Solutions e-mail: giometti@xxxxxxxxxxxx Linux Device Driver giometti@xxxxxxxxx Embedded Systems giometti@xxxxxxxx UNIX programming phone: +39 349 2432127
diff --git a/arch/mips/au1000/common/power.c b/arch/mips/au1000/common/power.c index 9b47082..482de93 100644 --- a/arch/mips/au1000/common/power.c +++ b/arch/mips/au1000/common/power.c @@ -88,7 +88,10 @@ static DEFINE_SPINLOCK(pm_lock); static uint sleep_aux_pll_cntrl; static uint sleep_cpu_pll_cntrl; static uint sleep_pin_function; +static uint sleep_gpio2_dir; +static uint sleep_gpio2_output; static uint sleep_gpio2_enable; +static uint sleep_gpio2_inten; static uint sleep_uart0_inten; static uint sleep_uart0_fifoctl; static uint sleep_uart0_linectl; @@ -182,6 +185,10 @@ save_core_regs(void) sleep_cpu_pll_cntrl = au_readl(SYS_CPUPLL); sleep_pin_function = au_readl(SYS_PINFUNC); + + sleep_gpio2_dir = au_readl(GPIO2_DIR); + sleep_gpio2_output = au_readl(GPIO2_OUTPUT); + sleep_gpio2_inten = au_readl(GPIO2_INTENABLE); sleep_gpio2_enable = au_readl(GPIO2_ENABLE); /* Save the static memory controller configuration. @@ -209,7 +216,11 @@ restore_core_regs(void) au_writel(sleep_aux_pll_cntrl, SYS_AUXPLL); au_sync(); au_writel(sleep_cpu_pll_cntrl, SYS_CPUPLL); au_sync(); au_writel(sleep_pin_function, SYS_PINFUNC); au_sync(); + au_writel(sleep_gpio2_enable, GPIO2_ENABLE); au_sync(); + au_writel(sleep_gpio2_dir, GPIO2_DIR); au_sync(); + au_writel((sleep_gpio2_output<<16)|sleep_gpio2_output, GPIO2_OUTPUT); au_sync(); + au_writel(sleep_gpio2_inten, GPIO2_INTENABLE); au_sync(); /* Restore the static memory controller configuration. */
