Hello.
Atsushi Nemoto wrote:
On Thu, 02 Feb 2006 21:46:25 +0300, Sergei Shtylylov <sshtylyov@xxxxxxxxxxxxx> said:
If mfc0 $12 follows store and the mfc0 is last instruction of a
page and fetching the next instruction causes TLB miss, the result
of the mfc0 might wrongly contain EXL bit.
sshtylyov> Hmm, a TLB miss in fetching from KSEG0?!
We can call these inline functions from modules running on KSEG2.
Hm, I'm still learning Linux/MIPS, and have overlooked #ifdef MODULE. :-<
If I don't mistake, the offending code is in local_irq_disable,
local_irq_save, and local_irq_restore macros. The effect would be a crash on
any exception taken once interrupts get disabled in a module (*and* that code
happens to fall on a page boundary)... nasty. :-(
---
Atsushi Nemoto
WBR, Sergei
