On Thu, Jan 26, 2006 at 04:04:43PM -0700, Grant Grundler wrote:
> On Thu, Jan 26, 2006 at 04:40:21PM +0000, Russell King wrote:
> > Ok, I can see I'm going to lose this, but what the hell.
>
> Well, we agree. As Richard Henderson just pointed out, parisc
> is among those that can't load large immediate values either.
>
> > Let's compare the implementations, which are:
> ...
> > int arm_ffs(unsigned long word)
> > {
> > int k = 31;
> > if (word & 0x0000ffff) { k -= 16; word <<= 16; }
> > if (word & 0x00ff0000) { k -= 8; word <<= 8; }
> > if (word & 0x0f000000) { k -= 4; word <<= 4; }
> > if (word & 0x30000000) { k -= 2; word <<= 2; }
> > if (word & 0x40000000) { k -= 1; }
> > return k;
> > }
>
> Of those suggested, arm_ffs() is closest to what parisc
> currently has in assembly (see include/asm-parisc/bitops.h:__ffs()).
> But given how unobvious the parisc instruction nullification works,
> the rough equivalent in "C" (untested!) would look something like:
>
> unsigned int k = 31;
> if (word & 0x0000ffff) { k -= 16;} else { word >>= 16; }
> if (word & 0x000000ff) { k -= 8;} else { word >>= 8; }
> if (word & 0x0000000f) { k -= 4;} else { word >>= 4; }
> if (word & 0x00000003) { k -= 2;} else { word >>= 2; }
> if (word & 0x00000001) { k -= 1;}
> return k;
>
> I doubt that's better for arm but am curious how it compares.
> You have time to try it?
This is essentially the same as arm_ffs():
grundler_ffs:
mov r3, r0, asl #16
mov r3, r3, lsr #16
cmp r3, #0
moveq r0, r0, lsr #16
mov r3, #31
movne r3, #15
tst r0, #255
moveq r0, r0, lsr #8
subne r3, r3, #8
tst r0, #15
moveq r0, r0, lsr #4
subne r3, r3, #4
tst r0, #3
moveq r0, r0, lsr #2
subne r3, r3, #2
tst r0, #1
subne r3, r3, #1
mov r0, r3
mov pc, lr
only that the shifts, immediate values and the sense of some of the
conditional instructions have changed. Therefore, the parisc rough
equivalent looks like it would be suitable for ARM as well.
> > Clearly the smallest of the lot with the smallest register pressure,
> > being the best candidate out of the lot, whether we inline it or not.
>
> Agreed. But I expect parisc will have to continue using it's asm
> sequence and ignore the generic version. AFAIK, the compiler isn't that
> good with instruction nullification and I have other issues I'd
> rather work on.
Me too - already solved this problem once. However, I'd rather not
needlessly take a step backwards in the name of generic bitops.
--
Russell King
Linux kernel 2.6 ARM Linux - http://www.arm.linux.org.uk/
maintainer of: 2.6 Serial core
