Here is a little patch to optimize swab operations by using "wsbh"
instruction available on mips revision 2 cpus. I do not know what
condition I should use to compile this only for mips r2 cpu though.
Comments ?
Thanks
--
Franck
--- linux.git/include/asm-mips/byteorder.h~old 2006-01-25
09:39:33.000000000 +0100
+++ linux.git/include/asm-mips/byteorder.h 2006-01-25 10:30:10.000000000 +0100
@@ -8,15 +8,39 @@
#ifndef _ASM_BYTEORDER_H
#define _ASM_BYTEORDER_H
+#include <linux/compiler.h>
#include <asm/types.h>
#ifdef __GNUC__
+/* FIXME: MIPS_R2 only */
+static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x)
+{
+ __asm__(
+ "wsbh %0, %1\n"
+ : "=r" (x)
+ : "r" (x));
+ return x;
+}
+
+static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
+{
+ __asm__(
+ "wsbh %0, %1\n\t"
+ "rotr %0, %0, 16\n"
+ : "=r" (x)
+ : "r" (x));
+ return x;
+}
+
#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
# define __BYTEORDER_HAS_U64__
# define __SWAB_64_THRU_32__
#endif
+#define __arch__swab16(x) ___arch__swab16(x)
+#define __arch__swab32(x) ___arch__swab32(x)
+
#endif /* __GNUC__ */
#if defined (__MIPSEB__)
