The ptrace temporarily enable CP1 without fpu-ownership. These
regions should be protected from preempt.
Signed-off-by: Atsushi Nemoto <anemo@xxxxxxxxxxxxx>
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -126,10 +126,12 @@ int ptrace_getfpregs (struct task_struct
__put_user (child->thread.fpu.hard.fcr31, data + 64);
+ preempt_disable();
flags = read_c0_status();
__enable_fpu();
__asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
write_c0_status(flags);
+ preempt_enable();
__put_user (tmp, data + 65);
} else {
__put_user (child->thread.fpu.soft.fcr31, data + 64);
@@ -284,10 +286,12 @@ asmlinkage int sys_ptrace(long request,
if (!cpu_has_fpu)
break;
+ preempt_disable();
flags = read_c0_status();
__enable_fpu();
__asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
write_c0_status(flags);
+ preempt_enable();
break;
}
case DSP_BASE ... DSP_BASE + 5: {
diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c
--- a/arch/mips/kernel/ptrace32.c
+++ b/arch/mips/kernel/ptrace32.c
@@ -191,10 +191,12 @@ asmlinkage int sys32_ptrace(int request,
if (!cpu_has_fpu)
break;
+ preempt_disable();
flags = read_c0_status();
__enable_fpu();
__asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
write_c0_status(flags);
+ preempt_enable();
break;
}
case DSP_BASE ... DSP_BASE + 5:
