2005/10/4, Kevin D. Kissell <kevink@xxxxxxxx>: > > Well, the patch asked GCC to use the instruction set of the "4kec" CPU > > for both (and also the "mips32r2" ISA, but that's overridden by the > > former), so it must have been incorrect in the first place > > Which was sort-of why I replied. In particular, the MIPS32R2 bitfield > instructions will probably cause a reserved instruction fault on a 4KSc. > should I pass these options to GCC for 4KSc ? cflags-$(CONFIG_CPU_4KSC) += \ $(call set_gccflags,4kc,mips32r1,r4600,mips3,mips2) \ -msmartmips -Wa,--trap Thanks -- Franck