Hi Ralf,
This patch has updated vr41xx GIU function call for TB0226.
Please apply this patch.
Yoichi
Signed-off-by: Yoichi Yuasa <yuasa@xxxxxxxxxxxxxx>
diff -urN -X dontdiff a-orig/arch/mips/pci/fixup-tb0226.c a/arch/mips/pci/fixup-tb0226.c
--- a-orig/arch/mips/pci/fixup-tb0226.c 2004-11-01 01:07:33.000000000 +0900
+++ a/arch/mips/pci/fixup-tb0226.c 2005-08-10 00:00:20.000000000 +0900
@@ -1,7 +1,7 @@
/*
* fixup-tb0226.c, The TANBAC TB0226 specific PCI fixups.
*
- * Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@xxxxxxxxxxxxxx>
+ * Copyright (C) 2002-2005 Yoichi Yuasa <yuasa@xxxxxxxxxxxxxx>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -20,6 +20,7 @@
#include <linux/init.h>
#include <linux/pci.h>
+#include <asm/vr41xx/giu.h>
#include <asm/vr41xx/tb0226.h>
int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
@@ -29,42 +30,42 @@
switch (slot) {
case 12:
vr41xx_set_irq_trigger(GD82559_1_PIN,
- TRIGGER_LEVEL,
- SIGNAL_THROUGH);
- vr41xx_set_irq_level(GD82559_1_PIN, LEVEL_LOW);
+ IRQ_TRIGGER_LEVEL,
+ IRQ_SIGNAL_THROUGH);
+ vr41xx_set_irq_level(GD82559_1_PIN, IRQ_LEVEL_LOW);
irq = GD82559_1_IRQ;
break;
case 13:
vr41xx_set_irq_trigger(GD82559_2_PIN,
- TRIGGER_LEVEL,
- SIGNAL_THROUGH);
- vr41xx_set_irq_level(GD82559_2_PIN, LEVEL_LOW);
+ IRQ_TRIGGER_LEVEL,
+ IRQ_SIGNAL_THROUGH);
+ vr41xx_set_irq_level(GD82559_2_PIN, IRQ_LEVEL_LOW);
irq = GD82559_2_IRQ;
break;
case 14:
switch (pin) {
case 1:
vr41xx_set_irq_trigger(UPD720100_INTA_PIN,
- TRIGGER_LEVEL,
- SIGNAL_THROUGH);
+ IRQ_TRIGGER_LEVEL,
+ IRQ_SIGNAL_THROUGH);
vr41xx_set_irq_level(UPD720100_INTA_PIN,
- LEVEL_LOW);
+ IRQ_LEVEL_LOW);
irq = UPD720100_INTA_IRQ;
break;
case 2:
vr41xx_set_irq_trigger(UPD720100_INTB_PIN,
- TRIGGER_LEVEL,
- SIGNAL_THROUGH);
+ IRQ_TRIGGER_LEVEL,
+ IRQ_SIGNAL_THROUGH);
vr41xx_set_irq_level(UPD720100_INTB_PIN,
- LEVEL_LOW);
+ IRQ_LEVEL_LOW);
irq = UPD720100_INTB_IRQ;
break;
case 3:
vr41xx_set_irq_trigger(UPD720100_INTC_PIN,
- TRIGGER_LEVEL,
- SIGNAL_THROUGH);
+ IRQ_TRIGGER_LEVEL,
+ IRQ_SIGNAL_THROUGH);
vr41xx_set_irq_level(UPD720100_INTC_PIN,
- LEVEL_LOW);
+ IRQ_LEVEL_LOW);
irq = UPD720100_INTC_IRQ;
break;
default:
diff -urN -X dontdiff a-orig/arch/mips/vr41xx/Kconfig a/arch/mips/vr41xx/Kconfig
--- a-orig/arch/mips/vr41xx/Kconfig 2005-08-10 00:00:09.000000000 +0900
+++ a/arch/mips/vr41xx/Kconfig 2005-08-10 00:00:20.000000000 +0900
@@ -58,6 +58,7 @@
depends on TANBAC_TB022X
select PCI
select PCI_VR41XX
+ select GPIO_VR41XX
help
The TANBAC TB0226 (Mbase) is a MIPS-based platform manufactured by
TANBAC. Please refer to <http://www.tanbac.co.jp/> about Mbase.
