On Fri, 1 Jul 2005, Maciej W. Rozycki wrote:
> On Thu, 30 Jun 2005, David Daney wrote:
> > It seems that it is a memory consistancy problem of some sort. By
> > placing wbflush() after all writes to NIC registers it works. This
> > leads me to think that either the driver is buggy WRT processors that
> > have write-back queues or my implementation (the default implementation)
> > of writeb() and friends is buggy on this processor. Now it could be
> > that all that is needed is wmb() before some of the register writes, but
> > since on my processor they both do the same thing (sync) it is hard to
> > tell.
>
> Most likely that code has only been ever used on i386 systems (who'd want
> to use such a weird Ethernet chip elsewhere?), so don't expect it to be
> terribly sane.
The e100 is a quite popular card, so I'd expect it to be in use on many
platforms.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
