In this thread:
I relate the problems I was having with the Intel
e100 driver on a new 2.6.12 port to a 4ke based system.
My new question is: What are the semantics of
writeb(), writel() et al.? I would assume that the effects of these must
be in the same order that they were issued, and that any hardware write back
queue cannot combine or merge them in any way. Is that
correct?
A second question I have is: What is the
difference in the semantics of wbflush() and wmb()? For my CPU they both
evaluate to the same thing (the 'sync' instruction). So for my own sake I
could use either, but depending on the situation I assume that one would be used
over the other.
Thanks,
David Daney.
