Re: Qemu for MIPS

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Ralf Baechle (ralf@xxxxxxxxxxxxxx) writes:

> I've posted updated Qemu patches on
> 
>   ftp://ftp.linux-mips.org/pub/linux/mips/qemu
>   http://www.linux-mips.org/wiki/index.php/Qemu
> 
> Enhancements over last week's patches:
> 
>  o The count/compare interrupt will now properly be delivered.
>  o mfc0 will now return the proper value for the EXL and ERL flags
>  o eret will now consider the value of ERL and EXL.
>  o i8259 PIC is now properly cascaded to a CPU interrupt.
>  o An ISA NE2000 card will now be emulated.
>  o The CPU's random register now considers the value of the wired register

Great stuff...

> Known bugs:
> 
>  o ll/sc don't use a ll_bit like the real hardware thus right now any atomic
>    functions aren't really atomic.

I suppose you know that the CPUs all implement "break link on
exception" by zeroing the link bit on an 'eret'?  That doesn't sound
too hard...

>  o ll/sc really should be watching a physical not a virtual address or they
>    won't do much useful on any kind of shared memory structure.
>  o MIPS documentation documents the lladdr register to contain the virtual
>    address of the location being watched but about every implementation
>    since the R4000 actually keeps the physical address there - and documents
>    that as an erratum even though it actually the sensible thing to do.  We
>    should do the same.  Fortunately nothing that I know of actually relies
>    on the content of the lladdr register, so this one is cosmetic.

Arguably, an emulator should not provide the LLaddr register at all.
It's optional and "only available for debug" - and probably such
debugging is possible another way in an emulator.  Robust software
shouldn't depend on assuming the contents make sense.

> ...
> Kernel panic - not syncing: No init found.  Try passing init= option to kernel.
> 
> Which is a bug - there is a valid root filesystem.  Something for tomorrow.

Not quite there yet... but well done, again.

--
Dominic



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