Greg Weeks (greg.weeks@xxxxxxxxxxx) writes: > What's the performance hit for doing a pref on a cache line that is > already pref'd? Does it turn into a nop, or do we get some horrible > degenerate case? The specification for the prefetch instruction is fairly wide, to permit different implementations to act differently. It's perfectly legal for it to be a no-op. However, implementors are told that they should not do anything which would make performance *worse* than if it was a no-op. > Are 64 bit processors always at least 32 byte cache line size? There's no reliable correlation. If you were to go round the "autogenerated at kernel-startup-time" route, then you can figure out the line size from the "Config" registers (MIPS32- or MIPS64-compliant CPUs) or from a table of CPU IDs or otherwise (earlier CPUs)... -- Dominic Sweetman MIPS Technologies
