On Thu, 24 Feb 2005, Tsang-Ren Chang wrote: > Why does the CPU raise data bus error exception when I copy or read > /sbin/pppd every time? (cp0 hazards?) Bus error exceptions are triggered by an external signal, i.e. they come from board logic (the chipset). See your board's documentation for what can cause them. If the chipset provides any additional information for bus errors, you may decode it or at least dump in your own board-specific handler -- see the board_be_init variable for how to provide it and arch/mips/dec/ecc-berr.c for a reasonable working implementation. You may request the generic handler to ignore a bus error exception if the additional information from the chipset shows it's a recoverable condition, like an ECC-corrected memory error (it shouldn't normally use bus errors for signalling such events, though). Maciej
