Re: port on exotic board.

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Hello !
> > In "tlb_init" function, cp0 WIRED register is set
> to
> > zero, therefore the call to "local_flush_tlb_all" 
> > flush all TLB entries which were mapping my kernel
> > in the 3 first entries. Why is this necessary ?  
> 
> Setting WIRED to zero is just part of kernel
> start-up initialization.
> 
> In 2.4 it is done before board setup routine, which
> allows board
> to setup certain wired mapping.
> 
> In 2.6 it is done after board setup routine.  You
> are screwed. :) I think
> this needs to be fixed.  A couple of boards should
> be broken because of this.
> 

Well, you can again setup the wired tlb entries later.
For example, in case of Ocelot3 board (setup.c code),
the wired tlb entries are again created in the
time_init function.


void momenco_time_init(void)
{
	setup_wired_tlb_entries();

....

And it is set for the first time in the board setup
function:

static int __init momenco_ocelot_3_setup(void)
{
	unsigned int tmpword;

	board_time_init = momenco_time_init;

	_machine_restart = momenco_ocelot_restart;
	_machine_halt = momenco_ocelot_halt;
	_machine_power_off = momenco_ocelot_power_off;

	/* Wired TLB entries */
	setup_wired_tlb_entries();

....

Maybe you can do the same for this board as well

Thanks
Manish Lachwani



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