On Mon, Oct 25, 2004 at 12:28:50AM +0900, Atsushi Nemoto wrote: > mlachwani> The attached patch incorporates preemption enable/disable > mlachwani> in some parts of the kernel. I have tested this on the > mlachwani> Broadcom Sibyte. Please review ... > > 1. You add preempt_disable/preempt_enable to c-sb1.c and tlb-sb1.c. > Those are SB1 specific issue? If not, please fix other c-*.c and > tlb-*.c same way. This an SMP issue and only affects the SB1 code. The other CPU for which CVS supports SMP is the R10000 family; thanks to having nice caches it's immune mostly immune to this kind of issue. Ralf
