On Thu, Sep 23, 2004 at 11:54:19PM +1000, Stuart Longland wrote:
> Using a MIPS64 config (built using gas-abi=o32 as suggested by Kumba),
> it doesn't even get that far:
There is still a lot left broken - The attached patch fixes some obvious
stuff with address space and mibs abi.
Missing is a fix for ip22zilog.c which seems to be broken.
With this fix the machines goes userspace (reverse engineered by sound
of hard disk) but seems to die somewhere. Probably the same bug as seen
on other archs - die on first fork.
Flo
--
Florian Lohoff flo@xxxxxxxxxx +49-171-2280134
Heisenberg may have been here.
Index: arch/mips/Makefile
===================================================================
RCS file: /home/flo/linux-mips-cvs/linux/arch/mips/Makefile,v
retrieving revision 1.176
diff -u -r1.176 Makefile
--- arch/mips/Makefile 19 Sep 2004 00:15:05 -0000 1.176
+++ arch/mips/Makefile 22 Sep 2004 23:54:24 -0000
@@ -35,7 +35,7 @@
endif
ifdef CONFIG_MIPS64
gcc-abi = 64
-gas-abi = 32
+gas-abi = o64
tool-prefix = $(64bit-tool-prefix)
UTS_MACHINE := mips64
endif
@@ -107,7 +107,7 @@
break; \
done; \
if test "$(gcc-abi)" != "$(gas-abi)"; then \
- gas_abi="-Wa,-$(gas-abi) -Wa,-mgp$(gcc-abi)"; \
+ gas_abi="-Wa,-mabi=$(gas-abi) -Wa,-mgp$(gcc-abi)"; \
fi; \
if test "$$gcc_opt" = -march= && test -n "$$gcc_abi"; then \
$(CC) $$gcc_abi $$gcc_opt$$gcc_cpu -S -o /dev/null \
Index: arch/mips/lib-64/dump_tlb.c
===================================================================
RCS file: /home/flo/linux-mips-cvs/linux/arch/mips/lib-64/dump_tlb.c,v
retrieving revision 1.2
diff -u -r1.2 dump_tlb.c
--- arch/mips/lib-64/dump_tlb.c 11 Feb 2004 15:05:44 -0000 1.2
+++ arch/mips/lib-64/dump_tlb.c 23 Sep 2004 01:19:10 -0000
@@ -190,7 +190,7 @@
pgd = pgd_offset(current->mm, addr);
pmd = pmd_offset(pgd, addr);
pte = pte_offset(pmd, addr);
- paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
+ paddr = (CKSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
paddr |= (addr & ~PAGE_MASK);
return paddr;
Index: arch/mips/mm/c-r4k.c
===================================================================
RCS file: /home/flo/linux-mips-cvs/linux/arch/mips/mm/c-r4k.c,v
retrieving revision 1.89
diff -u -r1.89 c-r4k.c
--- arch/mips/mm/c-r4k.c 24 Aug 2004 16:02:25 -0000 1.89
+++ arch/mips/mm/c-r4k.c 23 Sep 2004 01:11:27 -0000
@@ -49,7 +49,7 @@
#define R4600_HIT_CACHEOP_WAR_IMPL \
do { \
if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x()) \
- *(volatile unsigned long *)KSEG1; \
+ *(volatile unsigned long *)CKSEG1; \
if (R4600_V1_HIT_CACHEOP_WAR) \
__asm__ __volatile__("nop;nop;nop;nop"); \
} while (0)
@@ -983,7 +983,7 @@
case CPU_R4000MC:
case CPU_R4400SC:
case CPU_R4400MC:
- probe_scache_kseg1 = (probe_func_t) (KSEG1ADDR(&probe_scache));
+ probe_scache_kseg1 = (probe_func_t) (CKSEG1ADDR(&probe_scache));
sc_present = probe_scache_kseg1(config);
if (sc_present)
c->options |= MIPS_CPU_CACHE_CDEX_S;
Index: arch/mips/sgi-ip22/ip22-setup.c
===================================================================
RCS file: /home/flo/linux-mips-cvs/linux/arch/mips/sgi-ip22/ip22-setup.c,v
retrieving revision 1.39
diff -u -r1.39 ip22-setup.c
--- arch/mips/sgi-ip22/ip22-setup.c 20 Aug 2004 10:03:22 -0000 1.39
+++ arch/mips/sgi-ip22/ip22-setup.c 23 Sep 2004 00:56:44 -0000
@@ -76,7 +76,7 @@
#endif
/* Set EISA IO port base for Indigo2 */
- set_io_port_base(KSEG1ADDR(0x00080000));
+ set_io_port_base(CKSEG1ADDR(0x00080000));
/* ARCS console environment variable is set to "g?" for
* graphics console, it is set to "d" for the first serial
Index: drivers/net/sgiseeq.c
===================================================================
RCS file: /home/flo/linux-mips-cvs/linux/drivers/net/sgiseeq.c,v
retrieving revision 1.61
diff -u -r1.61 sgiseeq.c
--- drivers/net/sgiseeq.c 31 Jul 2004 01:47:50 -0000 1.61
+++ drivers/net/sgiseeq.c 23 Sep 2004 01:02:06 -0000
@@ -169,7 +169,7 @@
buffer = (unsigned long) kmalloc(PKT_BUF_SZ, GFP_KERNEL);
if (!buffer)
return -ENOMEM;
- sp->tx_desc[i].buf_vaddr = KSEG1ADDR(buffer);
+ sp->tx_desc[i].buf_vaddr = CKSEG1ADDR(buffer);
sp->tx_desc[i].tdma.pbuf = CPHYSADDR(buffer);
}
sp->tx_desc[i].tdma.cntinfo = TCNTINFO_INIT;
@@ -183,7 +183,7 @@
buffer = (unsigned long) kmalloc(PKT_BUF_SZ, GFP_KERNEL);
if (!buffer)
return -ENOMEM;
- sp->rx_desc[i].buf_vaddr = KSEG1ADDR(buffer);
+ sp->rx_desc[i].buf_vaddr = CKSEG1ADDR(buffer);
sp->rx_desc[i].rdma.pbuf = CPHYSADDR(buffer);
}
sp->rx_desc[i].rdma.cntinfo = RCNTINFO_INIT;
@@ -374,7 +374,7 @@
*/
while ((td->tdma.cntinfo & (HPCDMA_XIU | HPCDMA_ETXD)) ==
(HPCDMA_XIU | HPCDMA_ETXD))
- td = (struct sgiseeq_tx_desc *)(long) KSEG1ADDR(td->tdma.pnext);
+ td = (struct sgiseeq_tx_desc *)(long) CKSEG1ADDR(td->tdma.pnext);
if (td->tdma.cntinfo & HPCDMA_XIU) {
hregs->tx_ndptr = CPHYSADDR(td);
hregs->tx_ctrl = HPC3_ETXCTRL_ACTIVE;
@@ -671,11 +671,11 @@
sp->mode = SEEQ_RCMD_RBCAST;
sp->rx_desc = (struct sgiseeq_rx_desc *)
- KSEG1ADDR(ALIGNED(&sp->srings->rxvector[0]));
+ CKSEG1ADDR(ALIGNED(&sp->srings->rxvector[0]));
dma_cache_wback_inv((unsigned long)&sp->srings->rxvector,
sizeof(sp->srings->rxvector));
sp->tx_desc = (struct sgiseeq_tx_desc *)
- KSEG1ADDR(ALIGNED(&sp->srings->txvector[0]));
+ CKSEG1ADDR(ALIGNED(&sp->srings->txvector[0]));
dma_cache_wback_inv((unsigned long)&sp->srings->txvector,
sizeof(sp->srings->txvector));
Index: drivers/video/console/newport_con.c
===================================================================
RCS file: /home/flo/linux-mips-cvs/linux/drivers/video/console/newport_con.c,v
retrieving revision 1.9
diff -u -r1.9 newport_con.c
--- drivers/video/console/newport_con.c 6 Aug 2004 00:33:29 -0000 1.9
+++ drivers/video/console/newport_con.c 23 Sep 2004 01:21:54 -0000
@@ -290,7 +290,7 @@
if (!sgi_gfxaddr)
return NULL;
- npregs = (struct newport_regs *) (KSEG1 + sgi_gfxaddr);
+ npregs = (struct newport_regs *) (CKSEG1ADDR(sgi_gfxaddr));
npregs->cset.config = NPORT_CFG_GD0;
if (newport_wait()) {
Index: include/asm-mips/addrspace.h
===================================================================
RCS file: /home/flo/linux-mips-cvs/linux/include/asm-mips/addrspace.h,v
retrieving revision 1.13
diff -u -r1.13 addrspace.h
--- include/asm-mips/addrspace.h 30 Nov 2003 01:52:25 -0000 1.13
+++ include/asm-mips/addrspace.h 23 Sep 2004 01:08:48 -0000
@@ -38,16 +38,6 @@
#endif
/*
- * Memory segments (32bit kernel mode addresses)
- * These are the traditional names used in the 32-bit universe.
- */
-#define KUSEG 0x00000000
-#define KSEG0 0x80000000
-#define KSEG1 0xa0000000
-#define KSEG2 0xc0000000
-#define KSEG3 0xe0000000
-
-/*
* Returns the kernel segment base of a given address
*/
#define KSEGX(a) ((_ACAST32_ (a)) & 0xe0000000)
@@ -58,18 +48,7 @@
#define CPHYSADDR(a) ((_ACAST32_ (a)) & 0x1fffffff)
#define XPHYSADDR(a) ((_ACAST64_ (a)) & 0x000000ffffffffff)
-/*
- * Map an address to a certain kernel segment
- */
-#define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0)
-#define KSEG1ADDR(a) (CPHYSADDR(a) | KSEG1)
-#define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
-#define KSEG3ADDR(a) (CPHYSADDR(a) | KSEG3)
-
-#define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0)
-#define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1)
-#define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2)
-#define CKSEG3ADDR(a) (CPHYSADDR(a) | CKSEG3)
+#ifdef CONFIG_MIPS64
/*
* Memory segments (64bit kernel mode addresses)
@@ -85,6 +64,44 @@
#define CKSSEG 0xffffffffc0000000
#define CKSEG3 0xffffffffe0000000
+#define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0)
+#define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1)
+#define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2)
+#define CKSEG3ADDR(a) (CPHYSADDR(a) | CKSEG3)
+
+#else
+
+#define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0)
+#define CKSEG1ADDR(a) (CPHYSADDR(a) | KSEG1)
+#define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
+#define CKSEG3ADDR(a) (CPHYSADDR(a) | KSEG3)
+
+/*
+ * Map an address to a certain kernel segment
+ */
+#define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0)
+#define KSEG1ADDR(a) (CPHYSADDR(a) | KSEG1)
+#define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
+#define KSEG3ADDR(a) (CPHYSADDR(a) | KSEG3)
+
+/*
+ * Memory segments (32bit kernel mode addresses)
+ * These are the traditional names used in the 32-bit universe.
+ */
+#define KUSEG 0x00000000
+#define KSEG0 0x80000000
+#define KSEG1 0xa0000000
+#define KSEG2 0xc0000000
+#define KSEG3 0xe0000000
+
+#define CKUSEG 0x00000000
+#define CKSEG0 0x80000000
+#define CKSEG1 0xa0000000
+#define CKSEG2 0xc0000000
+#define CKSEG3 0xe0000000
+
+#endif
+
/*
* Cache modes for XKPHYS address conversion macros
*/
Index: include/asm-mips/r4kcache.h
===================================================================
RCS file: /home/flo/linux-mips-cvs/linux/include/asm-mips/r4kcache.h,v
retrieving revision 1.22
diff -u -r1.22 r4kcache.h
--- include/asm-mips/r4kcache.h 5 Jan 2004 01:56:01 -0000 1.22
+++ include/asm-mips/r4kcache.h 23 Sep 2004 01:09:47 -0000
@@ -26,7 +26,7 @@
* - We need a properly sign extended address for 64-bit code. To get away
* without ifdefs we let the compiler do it by a type cast.
*/
-#define INDEX_BASE ((int) KSEG0)
+#define INDEX_BASE CKSEG0
#define cache_op(op,addr) \
__asm__ __volatile__( \
--- include/asm-mips/mach-ip22/spaces.h 2004-09-21 12:59:52.000000000 +0200
+++ include/asm-mips/mach-ip22/spaces.h 2004-09-23 01:52:01.000000000 +0200
@@ -0,0 +1,55 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994 - 1999, 2000, 03, 04 Ralf Baechle
+ * Copyright (C) 2000, 2002 Maciej W. Rozycki
+ * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc.
+ */
+#ifndef _ASM_MACH_SPACES_H
+#define _ASM_MACH_SPACES_H
+
+#include <linux/config.h>
+
+#ifdef CONFIG_MIPS32
+
+#define CAC_BASE 0x80000000
+#define IO_BASE 0xa0000000
+#define UNCAC_BASE 0xa0000000
+#define MAP_BASE 0xc0000000
+
+/*
+ * This handles the memory map.
+ * We handle pages at KSEG0 for kernels with 32 bit address space.
+ */
+#define PAGE_OFFSET 0x80000000UL
+
+/*
+ * Memory above this physical address will be considered highmem.
+ */
+#ifndef HIGHMEM_START
+#define HIGHMEM_START 0x20000000UL
+#endif
+
+#endif /* CONFIG_MIPS32 */
+
+#ifdef CONFIG_MIPS64
+#define PAGE_OFFSET 0xffffffff80000000UL
+
+#ifndef HIGHMEM_START
+#define HIGHMEM_START (1UL << 59UL)
+#endif
+
+#define CAC_BASE 0xffffffff80000000
+#define IO_BASE 0xffffffffa0000000
+#define UNCAC_BASE 0xffffffffa0000000
+#define MAP_BASE 0xffffffffc0000000
+
+#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK))
+#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK))
+#define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK))
+
+#endif /* CONFIG_MIPS64 */
+
+#endif /* __ASM_MACH_GENERIC_SPACES_H */
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