vr4131 : cache/linesize

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



Hi all,

I'm currently trying to get kernel 2.6.8 running on a Casio BE-300, a NEC VR4131 (rev1.2) based PDA.

I noticed a (for me) strange result when comparing 2.4 with 2.6, please have a look at the linesize below:
kernel 2.4.18:
CPU revision is: 00000c80
Primary instruction cache 16kb, linesize 32 bytes.
Primary data cache 16kb, linesize 16 bytes.
kernel 2.6.8:
Primary instruction cache 16kB, physically tagged, 2-way, linesize 16 bytes.
Primary data cache 16kB 2-way, linesize 16 bytes.


Any idea why the reported icache linesize is different between2.4 and 2.6 ? Which one should I trust ?

and from the original botloader it looks like at boot config is set to:
# [4    ] DB: 0= data cache refill size=4 words
# [5    ] IB: 1=instruction cache refill size=8 words
# [6-8  ] DC: 100= data cache size, 16K
# [9-11 ] IC: 101= instruction cache size, 16K.

Is it common to have different dcache/icache  refill sizes ?

Thanks for your time,

Filip.



--
----

Do not follow where the path may lead. Go instead where there is no path and leave a trail  - Ralph Waldo Emerson

----

Filip Onkelinx
Heidebloemstraat 20, B-3500 Hasselt, BELGIUM
fax: +32 11 65 65 97, mobile: +32 475 69 47 63
filip@xxxxxxxxxxxx




[Index of Archives]     [Linux MIPS Home]     [LKML Archive]     [Linux ARM Kernel]     [Linux ARM]     [Linux]     [Git]     [Yosemite News]     [Linux SCSI]     [Linux Hams]

  Powered by Linux