Hi Ralf,
setup.c for ZAO Networks Capcella was updated.
Please apply to v2.6 CVS tree.
Yoichi
diff -urN -X dontdiff linux-orig/arch/mips/vr41xx/zao-capcella/setup.c linux/arch/mips/vr41xx/zao-capcella/setup.c
--- linux-orig/arch/mips/vr41xx/zao-capcella/setup.c Thu Apr 29 10:42:49 2004
+++ linux/arch/mips/vr41xx/zao-capcella/setup.c Fri May 14 00:08:36 2004
@@ -18,59 +18,8 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/config.h>
-#include <linux/ioport.h>
-#include <asm/io.h>
-#include <asm/pci_channel.h>
-#include <asm/vr41xx/capcella.h>
-
-#ifdef CONFIG_PCI
-static struct resource vr41xx_pci_io_resource = {
- "PCI I/O space",
- VR41XX_PCI_IO_START,
- VR41XX_PCI_IO_END,
- IORESOURCE_IO
-};
-
-static struct resource vr41xx_pci_mem_resource = {
- "PCI memory space",
- VR41XX_PCI_MEM_START,
- VR41XX_PCI_MEM_END,
- IORESOURCE_MEM
-};
-
-extern struct pci_ops vr41xx_pci_ops;
-
-struct pci_controller vr41xx_controller = {
- .pci_ops = &vr41xx_pci_ops,
- .io_resource = &vr41xx_pci_io_resource,
- .mem_resource = &vr41xx_pci_mem_resource,
-};
-
-struct vr41xx_pci_address_space vr41xx_pci_mem1 = {
- VR41XX_PCI_MEM1_BASE,
- VR41XX_PCI_MEM1_MASK,
- IO_MEM1_RESOURCE_START
-};
-
-struct vr41xx_pci_address_space vr41xx_pci_mem2 = {
- VR41XX_PCI_MEM2_BASE,
- VR41XX_PCI_MEM2_MASK,
- IO_MEM2_RESOURCE_START
-};
-
-struct vr41xx_pci_address_space vr41xx_pci_io = {
- VR41XX_PCI_IO_BASE,
- VR41XX_PCI_IO_MASK,
- IO_PORT_RESOURCE_START
-};
-
-static struct vr41xx_pci_address_map pci_address_map = {
- &vr41xx_pci_mem1,
- &vr41xx_pci_mem2,
- &vr41xx_pci_io
-};
-#endif
+#include <asm/vr41xx/vr41xx.h>
const char *get_system_type(void)
{
@@ -79,18 +28,10 @@
static int zao_capcella_setup(void)
{
- set_io_port_base(IO_PORT_BASE);
- ioport_resource.start = IO_PORT_RESOURCE_START;
- ioport_resource.end = IO_PORT_RESOURCE_END;
-
#ifdef CONFIG_SERIAL_8250
vr41xx_select_siu_interface(SIU_RS232C, IRDA_NONE);
vr41xx_siu_init();
vr41xx_dsiu_init();
-#endif
-
-#ifdef CONFIG_PCI
- vr41xx_pciu_init(&pci_address_map);
#endif
return 0;
diff -urN -X dontdiff linux-orig/include/asm-mips/vr41xx/capcella.h linux/include/asm-mips/vr41xx/capcella.h
--- linux-orig/include/asm-mips/vr41xx/capcella.h Mon Mar 24 00:01:42 2003
+++ linux/include/asm-mips/vr41xx/capcella.h Fri May 14 00:08:36 2004
@@ -1,52 +1,26 @@
/*
- * FILE NAME
- * include/asm-mips/vr41xx/capcella.h
+ * capcella.h, Include file for ZAO Networks Capcella.
*
- * BRIEF MODULE DESCRIPTION
- * Include file for ZAO Networks Capcella.
+ * Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@xxxxxxxxxxxxxx>
*
- * Copyright 2002,2003 Yoichi Yuasa
- * yuasa@xxxxxxxxxxxxxx
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
*
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ZAO_CAPCELLA_H
#define __ZAO_CAPCELLA_H
-#include <asm/addrspace.h>
#include <asm/vr41xx/vr41xx.h>
-
-/*
- * Board specific address mapping
- */
-#define VR41XX_PCI_MEM1_BASE 0x10000000
-#define VR41XX_PCI_MEM1_SIZE 0x04000000
-#define VR41XX_PCI_MEM1_MASK 0x7c000000
-
-#define VR41XX_PCI_MEM2_BASE 0x14000000
-#define VR41XX_PCI_MEM2_SIZE 0x02000000
-#define VR41XX_PCI_MEM2_MASK 0x7e000000
-
-#define VR41XX_PCI_IO_BASE 0x16000000
-#define VR41XX_PCI_IO_SIZE 0x02000000
-#define VR41XX_PCI_IO_MASK 0x7e000000
-
-#define VR41XX_PCI_IO_START 0x01000000
-#define VR41XX_PCI_IO_END 0x01ffffff
-
-#define VR41XX_PCI_MEM_START 0x12000000
-#define VR41XX_PCI_MEM_END 0x15ffffff
-
-#define IO_PORT_BASE KSEG1ADDR(VR41XX_PCI_IO_BASE)
-#define IO_PORT_RESOURCE_START 0
-#define IO_PORT_RESOURCE_END VR41XX_PCI_IO_SIZE
-#define IO_MEM1_RESOURCE_START VR41XX_PCI_MEM1_BASE
-#define IO_MEM1_RESOURCE_END (VR41XX_PCI_MEM1_BASE + VR41XX_PCI_MEM1_SIZE)
-#define IO_MEM2_RESOURCE_START VR41XX_PCI_MEM2_BASE
-#define IO_MEM2_RESOURCE_END (VR41XX_PCI_MEM2_BASE + VR41XX_PCI_MEM2_SIZE)
/*
* General-Purpose I/O Pin Number
