My Octane got as far as 'Calibrating delay loop... ' now. It works with ARCS graphical console, which is a Good Thing. Memory identification is correct. Caches work OK. I'm going to do the IRQs tomorrow, but I foresee it will be really hard as there is no documentation for the HEART. Well, we shall experiment. Fortunately, the Octane has one really nice feature: the power button is hooked up to an interrupt source. It may prove quite useful for debugging. Interesting note: the ARCS console breaks when I change KSEG0 cache coherence in the CP0_CONFIG register (in c-r4k.c). Of course, it breaks sooner or later, not exactly afterwards, unless I flush cache exactly after changing; it breaks immediately then. I don't give a hoot, because IP30 has almost no RAM in KSEG0 and the kernel runs in XKPHYS, always cached copy-on-write. But those of you with another machines might be interested. Stanislaw Skowronek --<=>-- Paranoid: one who is truly in touch with reality.
