>>>>> On Fri, 26 Mar 2004 18:43:17 +0000, Peter Horton <pdh@colonel-panic.org> said: >> I'm quite sure that it's a kernel bug and may cause problems if any >> PIO block device (PIO ide, ide-cs, mtdblock, etc.) are used on CPUs >> which have d-cache aliases (not only MIPS). We need a correct fix >> ... pdh> True. A proper fix would flush the relevant page after PIO pdh> transfers into the page cache / swap pages. Unfortunately this pdh> would require a hook in the generic kernel. I found somewhat long discussions in linux-kernel ML. Subject: [patch] cache flush bug in mm/filemap.c (all kernels >= 2.5.30(at least)) http://www.ussg.iu.edu/hypermail/linux/kernel/0305.2/1205.html http://www.ussg.iu.edu/hypermail/linux/kernel/0305.3/0151.html Still I do not understand whole story on the thread, David S. Miller said that architecture defined IDE insw/outsw macro should do the flushing in this case, if I understand correctly. Definitely sparc64 __ide_insw do it. Hmm ... --- Atsushi Nemoto
