Hi All,
In R4000 & descendent processors, interrupt number 7
is being used for internal timer interrupt. From this
i understand that the timer interrupt is also maskable
when the IE bit in status register is cleared. If
somebody mask this interrupt for a long time
erroneously, then won't there be a problem in
maintaining the system time?
Please correct me if i am wrong..
Does the system time is maintained via NMI?
Thanks in advance,
-karthi
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