Hi,
At Thu, 18 Dec 2003 09:43:21 -0800,
Jun Sun wrote:
>
> On Thu, Dec 18, 2003 at 07:58:36PM +0530, samavarthy c wrote:
> > Hi,
(snip)
>
> Another possiblity (which is probably more likely) is the IRQ
> number is not seupt correctly.
And another possibilities are:
DMA cache coherency
NEC VR4xxxs have no bus-snoop function. So
cache-coherency must be maintaind by software.
(or use KSEG1 access)
But I remember linux-2.4.18 of usb-ohci.c doesn't have
this problem.
Read/write cycle order
Read/write cycle order of CPU instruction level is
guaranteed at bus level?
( Or at assembler level, the sequent instruction is
re-ordered ? )
Newer version of usb-ohci.c has some wmb() funtions.
It synchronizes read/write order.
I got similar errors on VR4181A with 2.4.18 kernel. VR4181A has
built-in USB OHCI 1.1 host connected internal PCI bus.
To fix this problem, I compared newer usb-ohci.c and put wmb()
corresponded place. It is expaneded as subsequent NOPs. (VR4xxx has
real SYNC instruction.)
Thanks.
_._. __._ _ . ... _ .___ ._. _____ _... ._ _._ _.._. .____ _ . ... _
Kunihiko IMAI
