On Mon, 2003-06-16 at 17:36, Joseph Chiu wrote: > Hi, > Is there a (proper) way to add a page entry in the TLB it's always valid? > Specifically, accesses to memory-mapped hardware (PCMCIA) causes the kernel > to oops under heavy interrupt loading. > It seems to me that the page entry in the TLB is getting flushed out under > the activity; and when the ioremap'd memory region is accesses, the > exception handling for the missing translation does not run. > > I'm afraid my two days of googling hasn't turned up the right information. > I think I just don't know the right terminology and I hope someone can at > least point me in the right direction. > Thanks. > Joseph > (I am running 2.4.18-mips) So is this a kernel from linux-mips.org? Are you using the 36 bit I/O patch in that kernel, or the pseudo-address translation hack that I removed later? What pcmcia I/O card are you using and what tests are you running? Pete
