On Thu, Mar 13, 2003 at 06:13:08PM -0800, Wayne Gowcher wrote: > I am wondering if someone could point me towards > articles / source code that would give me a little > insight into how to debug cache problems in mips. > > For example , how do I inspect the contents of the > cache ? Are there routines to dump out the contents of > the cache ? Frankly, such code isn't to useful. The problems in the cache code can be fairly subtle. The only thing that has worked halfway well is reading the code 1,000 times more after having read it 1,000 times. And because it's such a nice job, read it another 1000 times when finished. If you're refering to the current round of cache problems introduced about three days ago when I eleminated flush_page_to_ram() and replace it with flush_dcache_page() - the untested quickfix is changing the definitions of clear_user_page() and copy_user_page() in <asm/page.h> to flush the data cache after the operation, for example by invoking flush_cache_all(). This particular problem affects all processors with virtually indexed data caches except the R4000 and R4000 SC and MC versions and the R10000 family. And everybody's favorite question, was this necessary that late in 2.4? Yes, it was. The new mechanism deals is not only more efficient it also deals better with aliases between the pagecache and userspace mappings. Ralf
