Re: Improper handling of unaligned user address access?

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Mike Uhler wrote:
This looks like the unaligned access in a branch delay slot problem I
experienced a while ago, where the CPU doesn't set the BD flag if the branch is
not taken. Can you please try the patch I posted?

In this particular case, it would appear that it's not the delay slot problem.
According to the Cause value above, BD is set, and EPC has been rolled
back to point at the branch.  That all looks consistent to me.

Note that the lwl will not take an unaligned exception, and the Cause code
value indicates a TLB miss.  I don't have the full context of the problem,
but is 0xA (i.e., virtual page zero) actually a valid address?  If not,
that's the cause of the problem.

You are correct. 0xA is NOT actually a valid address which is the
problem. I believe the kernel should handle things more gracefully
and return EFAULT instead of killing the process. This code of mine
worked fine in an older 2.4.7 kernel. Why was 'verify_area' taken
out of 'traps.c' by the way?

By the way, having the oops message put out the BadVAddr and PRId CP0 registers
would be very helpful.

Here it is:

   <1>Unable to handle kernel paging request at virtual address 000000a,
     epc == 8025f00c, ra == 8011c3d4
   <1>BADVADDR = 00000000, CP0_PRID = 00002d22
   Oops in fault.c:do_page_fault, line 201:
   $0 : 00000000 00000012 0000001a 0000001a 8789ff18 0000000a 00000008
     7fff7d58
   $8 : 00000000 00000000 00000000 00000000 71236429 2aaa8000 7fff77f8
     2aaa83f8
   $16: 8789ff18 7fff7d58 00000000 00000001 004009b4 00000000 00000000
     00000000
   $24: 00000000 00401638                   8789e000 8789ff08 7fff7d20
     8011c3d4
   Hi : 00000007
   Lo : 00000000
   epc  : 8025f00c    Tainted: P
   Status: 3000fc03
   Cause : 90000008

The processor is a TX4927.

-Steve



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