On Thu, Jan 23, 2003 at 03:17:25PM -0800, Adam Kiepul wrote: > I would really appreciate if anyone could tell me whether > Hardware-maintained cache coherency between processors is required for > Linux SMP operation. (Sending just one copy of a posting is sufficient ...) There have been imho fairly ridiculous attempts at constructing dual-core SMPs for the use with Linux/MIPS by changing the kernel to 16kB page size [1] and using write through-caches plus some extra hacks. Needless to say the solution is about as stupid as something can be and is probably going to perform worse than a uniprocessor ... Ralf [1] good idea for other reasons but completly stupid in this context
