[PATCH]: fix compiler warnings in the math-emulator

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



Hi
        this patch does:

* redefine SETCX to only set cx
* define a new macre SETANDTESTCX for the few cases when we also want to
  test the value set.

Later, Juan.

Index: arch/mips/math-emu/dp_cmp.c
===================================================================
RCS file: /home/cvs/linux/arch/mips/math-emu/dp_cmp.c,v
retrieving revision 1.4.2.1
diff -u -r1.4.2.1 dp_cmp.c
--- arch/mips/math-emu/dp_cmp.c	5 Aug 2002 14:18:22 -0000	1.4.2.1
+++ arch/mips/math-emu/dp_cmp.c	18 Dec 2002 00:49:18 -0000
@@ -44,7 +44,7 @@
 		if (cmp & IEEE754_CUN)
 			return 1;
 		if (cmp & (IEEE754_CLT | IEEE754_CGT)) {
-			if (sig && SETCX(IEEE754_INVALID_OPERATION))
+			if (sig && SETANDTESTCX(IEEE754_INVALID_OPERATION))
 				return ieee754si_xcpt(0, "fcmpf", x);
 		}
 		return 0;
Index: arch/mips/math-emu/ieee754dp.c
===================================================================
RCS file: /home/cvs/linux/arch/mips/math-emu/ieee754dp.c,v
retrieving revision 1.5.2.3
diff -u -r1.5.2.3 ieee754dp.c
--- arch/mips/math-emu/ieee754dp.c	5 Aug 2002 23:53:34 -0000	1.5.2.3
+++ arch/mips/math-emu/ieee754dp.c	18 Dec 2002 00:49:18 -0000
@@ -69,7 +69,7 @@
 	if (!ieee754dp_issnan(r))	/* QNAN does not cause invalid op !! */
 		return r;
 
-	if (!SETCX(IEEE754_INVALID_OPERATION)) {
+	if (!SETANDTESTCX(IEEE754_INVALID_OPERATION)) {
 		/* not enabled convert to a quiet NaN */
 		DPMANT(r) &= (~DP_MBIT(DP_MBITS-1));
 		if (ieee754dp_isnan(r))
Index: arch/mips/math-emu/ieee754int.h
===================================================================
RCS file: /home/cvs/linux/arch/mips/math-emu/ieee754int.h,v
retrieving revision 1.3.2.2
diff -u -r1.3.2.2 ieee754int.h
--- arch/mips/math-emu/ieee754int.h	5 Aug 2002 23:53:34 -0000	1.3.2.2
+++ arch/mips/math-emu/ieee754int.h	18 Dec 2002 00:49:18 -0000
@@ -61,7 +61,10 @@
   (ieee754_csr.cx = 0)
 
 #define SETCX(x) \
-  (ieee754_csr.cx |= (x),ieee754_csr.sx |= (x),ieee754_csr.mx & (x))
+  (ieee754_csr.cx |= (x),ieee754_csr.sx |= (x))
+
+#define SETANDTESTCX(x) \
+  (SETCX(x),ieee754_csr.mx & (x))
 
 #define TSTX()	\
 	(ieee754_csr.cx & ieee754_csr.mx)
Index: arch/mips/math-emu/ieee754sp.c
===================================================================
RCS file: /home/cvs/linux/arch/mips/math-emu/ieee754sp.c,v
retrieving revision 1.6.2.2
diff -u -r1.6.2.2 ieee754sp.c
--- arch/mips/math-emu/ieee754sp.c	5 Aug 2002 23:53:34 -0000	1.6.2.2
+++ arch/mips/math-emu/ieee754sp.c	18 Dec 2002 00:49:18 -0000
@@ -70,7 +70,7 @@
 	if (!ieee754sp_issnan(r))	/* QNAN does not cause invalid op !! */
 		return r;
 
-	if (!SETCX(IEEE754_INVALID_OPERATION)) {
+	if (!SETANDTESTCX(IEEE754_INVALID_OPERATION)) {
 		/* not enabled convert to a quiet NaN */
 		SPMANT(r) &= (~SP_MBIT(SP_MBITS-1));
 		if (ieee754sp_isnan(r))
Index: arch/mips/math-emu/sp_cmp.c
===================================================================
RCS file: /home/cvs/linux/arch/mips/math-emu/sp_cmp.c,v
retrieving revision 1.4.2.1
diff -u -r1.4.2.1 sp_cmp.c
--- arch/mips/math-emu/sp_cmp.c	5 Aug 2002 14:18:23 -0000	1.4.2.1
+++ arch/mips/math-emu/sp_cmp.c	18 Dec 2002 00:49:18 -0000
@@ -44,7 +44,7 @@
 		if (cmp & IEEE754_CUN)
 			return 1;
 		if (cmp & (IEEE754_CLT | IEEE754_CGT)) {
-			if (sig && SETCX(IEEE754_INVALID_OPERATION))
+			if (sig && SETANDTESTCX(IEEE754_INVALID_OPERATION))
 				return ieee754si_xcpt(0, "fcmpf", x);
 		}
 		return 0;
-- 
In theory, practice and theory are the same, but in practice they 
are different -- Larry McVoy


[Index of Archives]     [Linux MIPS Home]     [LKML Archive]     [Linux ARM Kernel]     [Linux ARM]     [Linux]     [Git]     [Yosemite News]     [Linux SCSI]     [Linux Hams]

  Powered by Linux