On Tue, Dec 17, 2002 at 02:35:22PM +0000, Dominic Sweetman wrote: > Alternatively, many MIPS systems have a hardware feature which enables > them to generate imitation-x86 interrupt acknowledge cycles, so you > can keep the 8259s in complete ignorance that they're not being > controlled by an x86. Unless the hardware is an RM200 where under special circumstances the hardware acknowledge feature may result in loss of some or all i8259 interrupts until full-reinitialization of the i8259 ... Bugs, bugs ... Ralf
